| 摘要 |
PURPOSE:To enhance the withstand voltage between polysilicon layers in an integrated circuit device and reduce the parasitic capacity therebetween by employing a substance having extremely slow oxidate speed for a gate insulating film and independently controlling the thickness of an insulating film between the gate oxide film and the layer without particular mask. CONSTITUTION:Isolation oxide films 102 and a gate oxide film 103 are formed on a P-type silicon substrate 101, an Si3N4 film 105 is coated thereon, and a polysilicon gate electrode 106 is selectively formed thereon. Layers 104 are P<+>-type layers. The polysilicon layer 106 is coated with an SiO2 film 107. At this time the Si3N4 film is not almost oxidized. With a mask 107 the Si3N4 film 105 and the SiO2 film 103 are perforated with openings. Since the SiO2 film 107 has sufficiently thicker thickness than the Si3N4 film 103, most of it is not etched and retained. Then, the gate oxide film 108 is coated as oxidized, and the polysilicon gate electrode 109 is selectively formed thereon. Subsequently, an N<+>-type layer 110, SiO2 film 111 and PSG film 112 are formed as the conventional manner thereon, and electrode wires 114 are provided to complete it. This configuration can improve the withstand voltage between the polysilicon layers, reduces the parasitic capacity between the layers, and accelerates the operation of the integrated circuit. |
