Improvements relating to field effect transistors.

摘要

A field effect transistor of vertical structure includes source (2), channel (3) and drain (4) layers formed successively on an electrically-insulating substrate (1) and etched to form a mesa-like structure. A layer of dielectric material (7) covers at least part of the edge of the channel layer (3) around the periphery of the mesa. The drain electrode (16) is formed over the edge of the channel layer so that an electrically conducting channel can be induced between the source and drain layers at the edge of the channel layer. The transistor structure is particularly suitable for arrays of such transistors adapted for X-Y addressing.