发明名称 CONTROL SYSTEM FOR LINE SPEED
摘要 PURPOSE:To realize simple and effective line speed control system which can easily be applied to small sized station, by making variable the repetitive frequency of the fundamental clock by changing the initial value of register according to the line speed. CONSTITUTION:The output pulse of the clock oscillator 1 is started for the count from the content initially set to the register 2 at the advancement unit 3. When the content of the register 2 reaches a given value, the detector detects the overflow pulse OFP and inputs one clock pulse to the character assembling and disassembling circuit 6. Further, interruption is made to the processor by OFP and the register 2 is again initially set. By repeating the production of OFP and the initial set, the fundamental pulse of a given period can be fed to the circuit 6. By changing the initial set value of the processor 5 with the software control, the period of the fundamental pulse is variable and the circuit 6 determines the line speed handled with the period of the fundamental pulse. Accordingly, the number of circuits 6 can be determined by traffic intensity independently of the line speed, types and number, and this system can easily be applied to a small sized station.
申请公布号 JPS56760(A) 申请公布日期 1981.01.07
申请号 JP19790075579 申请日期 1979.06.18
申请人 FUJITSU LTD 发明人 MASUJIMA HIKARI;ONODERA AKIRA;CHINO MAMORU;UYAMA KATSUO
分类号 H04L29/02;G06F13/00;H04L12/00;H04L29/08 主分类号 H04L29/02
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