| 摘要 |
A converter for converting a delta sigma modulated signal into a pulse code modulated signal comprises an n bit counter, an (n-1) true/complement, zero one element which is controlled by the most significant bit of the counter and operates on (n-1) bits of the counter in accordance with the pulse density modulation input to produce weighted output samples. An m bit accumulator accumulates the weighted samples to produce pulse code modulated samples.
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