发明名称 SYNCHRONIZING STATE IDENTIFICATION CIRCUIT
摘要 PURPOSE:To attain the detection of coincidence of a long synchronizing word in a short time by applying successive comparison to remaining (N-n) bits one by one bit each based on the correlation detection signal of an n-bit correlation detection section detecting the correlation of initial n-bits in an N-bit synchronizing word, and identifying the result of comparison to identify the synchronizing state. CONSTITUTION:Upon the receipt of an N-bits synchronizing word, first n-bits (n<N) are inputted to an n-bit correlation detection section 21, in which the correlation is detected by comparing its pattern with a known detection pattern. When an n-bit correlation detection signal is outputted, a 1-bit successive compar ison section 22 applies successive comparison to remaining (N-n) bits one by one bit each. Then the coincident bit number of the (N-n) bits is identified to identify the synchronization state. Thus, since the n-bits are detected already, when the error in an input data is few, the n-bit detection is correct and the position of 1-bit successive comparison section 22. Thus, the comparison for synchronization establishment is implemented in a short time.
申请公布号 JPH0442630(A) 申请公布日期 1992.02.13
申请号 JP19900150428 申请日期 1990.06.08
申请人 FUJITSU LTD 发明人 SHIMADA HIDEHISA;YAMASHITA ATSUSHI
分类号 H04L7/08 主分类号 H04L7/08
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