发明名称 SEMICONDUCTOR STRUCTURES AND METHODS OF MAKING THEM
摘要 An integrated transistor circuit arrangement provides a multicollector transistor with Schottky diodes and ohmic connections selectively formed at the collector terminals. In the illustrative example, a vertical transistor is formed in an N-type epitaxial layer overlying an N+ substrate. A through-extending region of P+ material encircles the region of the epitaxial layer in which the vertical transistor is formed. The base of the vertical transistor is formed by the implanting of P-type impurity in a location spaced apart from the surfaces of the epitaxial layer. The resulting base has a symmetrical profile relative to the faces of the epitaxial layer. Therefore, the transistor may be operated with the collector at the surface without penalty of electrical operation. In the illustrative example, a PNP lateral transistor is utilized as a current source for the vertical transistor.
申请公布号 MY8000165(A) 申请公布日期 1980.12.31
申请号 MY19800000165 申请日期 1980.12.30
申请人 WESTERN ELECTRIC COMPANY 发明人 JORGE AGRAZ-DGUERENA;ALLAN WILLIAM FULTON
分类号 H01L21/8226;H01L21/331;H01L27/00;H01L27/02;H01L27/07;H01L27/082;H01L29/73;H03K19/091;(IPC1-7):H01L27/06;H01L27/08 主分类号 H01L21/8226
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