| 摘要 |
PURPOSE:To inhibit an instantaneous reset signal generated due to impact and noise for an electronic watch and prevent erroneous operation of the watch by sampling the reset signal. CONSTITUTION:When a signal is generated at a reset terminal a due to impact or noise, an AND gate 6 produces a logic product signal with a reset inhibit signal c from a driving circuit 3 and outputs it to the data terminal D and the reset terminal R of a D-FF 8a. Since the D-FF 8a becomes operating state with this signal but the fall timing of a signal 32Hz from a frequency divider 2 is displaced, the output Q from the D-FF 8a is reset as 0 to prevent erroneous operation for an electronic watch. |
