| 摘要 |
PURPOSE:To prevent the channel selection at detuning state, by adding the tuning voltage information from the microcomputer muCM and the clock pulse to the D/A conversion circuit and adding the clock pulse to muCM as driving clock after frequency division. CONSTITUTION:The tuning voltage information from the muCM39 is fed to the D/A converter 41, and the clock pulse from the oscillator 49 is fed to the converter 41. The converter 41 coverts the tuning voltage information into the pulse train having the pulse width information according to the tuning voltage, based on the clock pulse to add it to the LPF45, and the output is fed to the varactor diode of the tuner 46 for channel selection. In this case, the clock pulse from the oscillator 49 is frequency-divided at the variable frequency divider 51 and it is fed to the muCM39 as driving clock. Thus, the repetitive frequency of the clock pulse of the converter 41 is taken greater than the clock repetitive frequency of the muCM39 and the time constant of LPF45 can be decreased without increasing the ripple component of the output, allowing the unit to prevent from being entered into channel selection at detuning state. |
