| 摘要 |
PURPOSE:To reduce a synchronization discrimination time. CONSTITUTION:Delay devices 41-4n-1 output delay coded data signals resulting from a coded data signal delayed respectively from one bit to (n-1) bits. n-sets of error correction computing elements 21-2n-1 apply error check and synchronization discrimination to the coded data signal 102 and the (n-1) sets of delayed coded data signals based on a timing signal 108 and output synchronization discrimination signals 1061-106n-1 and corrected data signals 1051-105n-1 respectively. A synchronization data signal selector 3 selectively outputs a synchronization data signal 109 based on the synchronization discrimination signals 1061-106n-1 from the error correction computing elements 21-2n-1. |
