发明名称 SAMPLING CLOCK REPRODUCING UNIT
摘要 PURPOSE:To obtain excellent sampling clock, by feeding the clock run in signal (CRI signal) to the multiplier for the double frequency component. CONSTITUTION:The higher harmonic components of repetitive frequency of CRI signal are rejected from the signal fed to the input terminal 11 at the filter 12, and the CRI signal and the part slightly after it are picked up at the gate circit 13, they are converted into sinusoidal wave signal B and fed to the multiplier 14. The multiplier 14 has two input terminals, the signal B is fed to each input terminal, and the output signal C having double frequency can be obtained with multiplication. The ringing oscillation output D can be obtained by feeding this signal to the resonator 15, and excellent sampling clock can be obtained with wave forming.
申请公布号 JPS55162679(A) 申请公布日期 1980.12.18
申请号 JP19790071522 申请日期 1979.06.06
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 FUKUDA CHIKA;HIRASHIMA MASAYOSHI
分类号 H04L7/027;H04N7/00;H04N7/025;H04N7/03;H04N7/035;H04N7/083;H04N7/087;H04N7/088;H04N17/00 主分类号 H04L7/027
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