| 摘要 |
PURPOSE:To obtain a high integration degree, one-transistor-one-capacity memory cell by the method wherein a bit-line used also as a drain electrode is provided, a parallel plate capacitor is provided on a source electrode, and a word-line used also as a gate electrode is provided via gate insulation film. CONSTITUTION:Si substrate is selectively oxidized, and leaving part G, field oxide film 12 is produced. Doped poly Si electrodes 14 and 16 are provided, and these are covered with Si3N4, and thereby doped poly Si electrode 20 is formed. Next, Si3N4 18 is selectively removed and heat-oxidized, and thereby gate oxide films 22a and 22b are produced. At this time, since the impurity concentration of the substrate is lower than those of poly Si electrodes 14, 18 and 20, thick oxide film 22b is produced on the poly Si befoae thin gate oxide film 22a is produced on the substrate. This reduces the stray capacitance. At this time, being doped from poly Si, source and drain 26 and 28 are produced. Subsequently, Al gate electrode-word line combined 24 is formed. By this structure, it is possible to obtain a high integration degree one-transistor memory cell. |
