| 发明名称 |
TIMING MODEL AND CHARACTERIZATION SYSTEM FOR LOGIC SIMULATION OF INTEGRATED CIRCUITS WHICH TAKES INTO ACCOUNT PROCESS, TEMPERATURE AND POWER SUPPLY VARIATIONS |
| 摘要 |
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| 申请公布号 |
EP0753178(A1) |
申请公布日期 |
1997.01.15 |
| 申请号 |
EP19950907272 |
申请日期 |
1994.12.27 |
| 申请人 |
VLSI TECHNOLOGY, INC. |
发明人 |
MISHELOFF, MICHAEL, NORMAN |
| 分类号 |
G01R31/28;G06F17/50;H01L21/82;(IPC1-7):G06F17/50 |
主分类号 |
G01R31/28 |
| 代理机构 |
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代理人 |
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| 主权项 |
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| 地址 |
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