| 摘要 |
PROBLEM TO BE SOLVED: To impart freedom to the combination of a chip and a package by improving the layout of the peripheral part of the chip. SOLUTION: This device is constituted by arranging I/O regions 14 and pad regions 12 in the peripheral part of a chip. A wiring region 15 is formed between the I/O regions 14 and the pad regions 12. First wiring groups 16 parallel to the sides of the chip are formed in the wiring region 15. The part between the first wiring groups 16 and a second wiring group stretching from each I/O is selectively connected, and the part between the first wiring groups 16 and a third wiring group stretching from each pad 11 is selectively connected. |
