发明名称 |
Data transfer system including micro-program memory - transmits micro-instructions according to address memory and validates new address code after each sequence has been processed |
摘要 |
<p>The microprogramme control system includes a memory for a number of microprogramme, each of which comprises a number of micro-instructions each of which consists of a number of bits. An interruption procedure comprises a unit to derive a micro-instruction address, which is memorised according to a previous instruction. The new address is released according to a selection system. After the information has been transferred, a signal is returned to the address memory to validate a new address code. The first unit involved is a multiplexer, and further units include further multiplexers to distribute the addressed signals to the appropriate input/output units. The final signal to terminate the signal passes through an AND gate.</p> |
申请公布号 |
FR2456972(A1) |
申请公布日期 |
1980.12.12 |
申请号 |
FR19800001952 |
申请日期 |
1980.01.30 |
申请人 |
HONEYWELL INFORMATION SYSTEMS |
发明人 |
MING T. MIU, JOHN J. BRADLEY ET JIAN-KUO SHEN |
分类号 |
G06F9/22;G06F9/26;(IPC1-7):06F9/22;06F9/46 |
主分类号 |
G06F9/22 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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