| 摘要 |
PURPOSE:To obtain the vertical synchronizing signal with high reliability, by separating and picking up the composite synchronizing signal in the composite video signal, digitizing all the vertical synchronizing signals, processing the timing signal with a simple circuit constitution, and guaranteeing the interlace. CONSTITUTION:The composite synchronizing signal is separated at the synchronizing separation circuit 5 and it is fed to the vertical synchronizing circuit 6 and fed to the oscillator 7. The oscillator 7 makes coincidence the horizontal synchronizing signal included in the synchronizing signal with the horizontal signal externally for the phase and the frequency, and the center frequency is taken as the specified value and the output clock is fed to the circuit 6. The horizontal drive signal from the signal generating circuit of the circuit 6 is fed to the horizontal output circuit 8 and the three types of timing signals are produced from the separated vertical synchronizing signal through frequency division and processing, and the operating mode of the vertical synchronizing signal is judged through the phase comparison with the timing signal and the vertical synchronizing signal, and the count phase of clock is drawn in the synchronizing signal according to the result of judgement, and the vertical synchronizing signal with high reliability can be output from the vertical output circuit 9. |
