发明名称 CODEC
摘要 PURPOSE:To secure the general-purpose properties as well as reduce the number of external connection pins, by detecting the frequency to the several types of external clock signals and then dividing the frequency after setting the frequency division ratio in order to produce the constant conversion clock at all times. CONSTITUTION:Counter part 11 detects the frequency of the external clock signal which is applied through input terminal 2 and then normalizes the external clock signal in a period of the synchronous pulse and every N-count. Thus the carry signal is produced to be sent to control logic part 12. Part 12 decides the division ratio for division of the external clock signal and in accordance with the frequency of the external clock signal detected. Then the external clock signal is divided at variable divider part 13 and in accordance with the above division ratio. Thus the constant internal conversion clock signal frequency can be obtained to the several types of external clock signal frequencies. And then the general-purpose properties is obtained by always securing the constant function for both the coding and encoding. At the same time, the number of the external connection pins can be reduced.
申请公布号 JPS55158754(A) 申请公布日期 1980.12.10
申请号 JP19790065829 申请日期 1979.05.28
申请人 FUJITSU LTD 发明人 YAMAZAWA MASAO;IKEZAWA TOSHI;TAKAHASHI MASAYUKI
分类号 H03M1/66;H04L7/00;H04L7/04;H04L29/08 主分类号 H03M1/66
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