| 摘要 |
PURPOSE:To decrease both the chip area and the amount of power consumption and then increase the test accuracy over a wide range of the working voltage by means of the differentiating circuit consisting of MOSFET, the capacitor and the constant power source plus the integrating circuit comprising the different MOSFET and the capacitor, etc. each. CONSTITUTION:The output of the differentiating circuit consisting of MOSFETs 1, 2 and 3, capacitor 4 plus constant voltage circuit 15 each is supplied to the integrating circuit comprising rectified MOSFETs 6 and 7 plus capacitor 8 and circuit 15 each and via diode 5. Then the drain and the source are coupled between the input of the integrating circuit and common potential point VSS for FET6 with application of the constant voltage to the gate. And for FET7, the drain and the source are coupled between the integrating circuit and power voltage VDD with application of the constant voltage to the gate. Accordingly, the control can be given to the gate voltage of FFTs 3 and 7 with no effect of the power source caused by circuit 15. As a result, both the chip area and the amount of power consumption can be decreased, at the same time increasing the test accuracy over a wide range of the working voltage. |
