发明名称 PROCESSING CIRCUIT FOR DIGITAL SIGNAL
摘要 PURPOSE:To increase the function without increasing the number of pins and to realize arbitrary circuit types, by adding programmable internal wiring function such as the provision of connection block and operation block. CONSTITUTION:Connection block 100 switching the connection between input signal 70 and output signal 80 with a decode signal 90, and operational block 200 including a plurality of multipliers 30, addres 40, delay units 50 and delay units for timing adjustment, are provided. Further, a memory 130 stores various control signals to produce the coefficient 10A of the multiplier 30 and designation signals 110, 120 for delay amount of delay units 50 and 60 other than the signal 90. The content of memory of the memory 130 is written in from a write-in terminal in advance. With this constitution, the function can be increased without increasing the number of pins.
申请公布号 JPS55157036(A) 申请公布日期 1980.12.06
申请号 JP19790052676 申请日期 1979.04.27
申请人 NIPPON ELECTRIC CO 发明人 NAKAYAMA KENJI
分类号 G06F7/00;G06F17/10;H03H17/02;H03H17/04 主分类号 G06F7/00
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