| 摘要 |
PURPOSE:To improve reliability by obtaining a reception output by selecting information free of a parity error while duplexing individual input-output parts. CONSTITUTION:Word data W1 are simultaneously applied to duplexed individual input parts IN1a and IN1b via parity adding circuit PG and then sent out to transmission line TL by way of scanning circuit SCN, parallel-series converter PSC and modulator MOD. The transmitted data are reproduced by demodulator DEM and series-parallel converter SPC on a reception side and reproduced data are distributed to duplexed individual output parts T1a and T1b via distributor DS. The outputs of output parts T1a and T1b are supplied to switch part SWC controlled by parity check circuits PCa and PCb to select the output of a side with no parity check, which is output as word data W1 with a parity bit. Word data W2 and W3 are transmitted and received via an individual input-output part, which is not duplexed, in the conventional method. |
