| 摘要 |
PURPOSE:To avoid the increase in time required for error correction and in the hardware, by storing the information indicating one-bit error and two-bit error taken place in the past even if error of multi bits is taken place with elapsed time. CONSTITUTION:The bit information from a memory write-in information line fed from an external device 2 is fed to a check bit generating circuit CG and the information bit section MD of a memory M, the redundancy bit added for correction is produced from the circuit CG and added to the redundant bit section MC of the memory M. Address and control input are added to this memory M, and the bit information is output on the memory information line and the redundant bit information is output to the memory redundant bit information line with elapsed time, and the both bit information are fed to the syndrome calculation circuit CG. The output l5' from the circuit SG is fed to the syndrome memory SM and the output of the memory SM controls the decoder DEC taking the output l5' from the circuit SG as an input, and error correction is made by feeding the error bit identifying signal l6' to the error correction circuit DC. |
