发明名称 SEQUENCE CONTROLLER
摘要 PURPOSE:To enable normal control even if failures are continually taken place for a given time delaying the automatic initialization by taking the output of a failure detection circuit as L level. CONSTITUTION:A failure detection circuit 2 detects a failure in a control operation section 1 and the output A is taken as logically L level. Further, an automatic initialization circuit 3 receives the L level signal and produces a signal shot pulse B by the trailing of the signal. On the other hand, when a delay circuit 4 of a failure detection signal A receives the signal A, that is, when the level of signal A is at L, the output C of the circuit 4 is at L level with a delay. In this case, the delay time is made longer than the pulse width of the single shot pulse produced in the circuit 3. Thus, if failures are continually taken place within a given time, the output C of the circuit 4 is delayed and the function of automatic initialization is blocked, enabling normal control.
申请公布号 JPS55154605(A) 申请公布日期 1980.12.02
申请号 JP19790062266 申请日期 1979.05.22
申请人 TOKYO SHIBAURA ELECTRIC CO 发明人 HIYAMA YUTAKA
分类号 G05B9/02;G05B15/02;G05B19/02;G06F11/00;G06F11/14 主分类号 G05B9/02
代理机构 代理人
主权项
地址