发明名称 PROGRAMMABLE LOGIC CIRCUIT
摘要 PURPOSE:To make it possible to give expression by a simple logic formula by combining the output of a circuit, which carries AND into effect first and then performs OR with the result of the AND, with that of a circuit which carries the 1st OR into effect and then performs AND with the result of the OR. CONSTITUTION:Once supplied with binary input signals 31a-31n forming the 1st group, the 1st symmetrizing circuit 32 generates uninverted outputs 33a-33n and inverted outputs 33a''-33n''. On the other hand, binary signals 31a'-31n' forming the 2nd group are input to the 2nd symmetrizing circuit 32', which generates uninverted outputs 33a'-33n' and inverted outputs 33a'''-33n'''. The output signals of this circuit 32 are appied to the 1st programmable logic circuit 34 to find AND of the binary signals and the outputs of 32' are applied to the 1st logic circuit 34' to find OR of binary signals; and the outputs of circuits 34 and 34' are input to the 2nd AND circuit 36 and the 2nd AND circuit 36' to AND and OR of predetermined binary signals and respective AND outputs and OR outputs are combined to output logic values via the 1st and the 2nd NOT circuits 38 and 38'.
申请公布号 JPS55154832(A) 申请公布日期 1980.12.02
申请号 JP19790063099 申请日期 1979.05.22
申请人 MITSUBISHI ELECTRIC CORP 发明人 FUSAOKA AKIRA
分类号 H03K19/177 主分类号 H03K19/177
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