发明名称 ERROR PROCESSING SYSTEM
摘要 PURPOSE:To perform error processing efficiently, by performing the error processing to all the devices if multiplex error is displayed with multiplex error latch and processing to the error processing only in other cases. CONSTITUTION:When an error detection circuit 9 detects an error, an error address register 10 performs error processing request to program. In this case, the address of the device during processing is tentatively stored in an error latch 11, but if a new error is detected at that stage, the address is stored in the multiplex error latch. Further, if the program receives the error processing and a latch 12 does not display the multiplex error, processing is made to the latch 11, and if multiplex error is displayed with the multiplex error latch 12, error processing is made to all the devices. Thus, error processing can efficiently be made by avoiding the processing to all the devices other than multiplex error display.
申请公布号 JPS55154638(A) 申请公布日期 1980.12.02
申请号 JP19790061281 申请日期 1979.05.18
申请人 HITACHI LTD 发明人 YAMAMOTO SEIICHIROU;ODA KENICHIROU;KOYAMA TOSHIAKI
分类号 G06F11/00 主分类号 G06F11/00
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