发明名称 INTEGRATED CIRCUIT
摘要 PURPOSE:To simultaneously insulate to isolate bipolar type and insulated gate type filed effect transistors one another by forming a monocrystalline layer on an n-type buried layer on a p-type Si substrate, and forming a polycrystalline layer on an insulating film. CONSTITUTION:An SiO2 film on a p-type Si substrate is perforated with openings, an n<+>-type buried layer 6 and an SiO2 thin film 5 and formed through the openings thereon, and an n-type monocrystalline layer 7 and an n-type polycrystalline layer 8 are formed thinly on the layer 6 and the thin film 5, respectively by a vapor phase growing process. Then, a polysilicon gate 10 and monocrystalline layers 9, 9' are patterned with anisotropic etching solution thereon, and the monocrystalline silicons are suitably inclined at the side surfaces to prevent the disconnection of wires. Subsequently, ion is implanted to the portion of the layer 9 to form a p-type layer, while the layer 9' is retained as an n-type layer. Then, P ion is implanted thereonto to form n-type source and drain 14, and 14' and to simultaneously form an n<+>-type emitter layer 11 and a collector pickup layer 12 thereon. Thereafter, an SiO2 film is coated thereon to form electrodes thereon so as to complete the integrated circuit.
申请公布号 JPS55154745(A) 申请公布日期 1980.12.02
申请号 JP19790062995 申请日期 1979.05.22
申请人 NIPPON ELECTRIC CO 发明人 OSHISHIBA KEIMEI
分类号 H01L29/78;H01L21/331;H01L21/761;H01L21/762;H01L21/8249;H01L27/06;H01L29/73 主分类号 H01L29/78
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