| 摘要 |
PURPOSE:To reduce the transmission period, by transmitting only the video signal if a character information is detected in all the small periods in one line and transferring the control to the transmission of next line immediately if not detected. CONSTITUTION:The character information of one line of an original 1 is read in with a high speed clock phi1, converted into a binary video signal V, and is stored in a video signal register 6 and also fed to the first and second discrimination circuits 7, 8. In case of L1-L1 where the character information is present in all the blocks of one line, the outputs B, C are both at a low level over one line period, and the video signal V and a synchronizing signal S are fed to the reception side for recording for one line's share. In case of L2-L2 where the character information is present only in a part of blocks during one line, a flag signal F1, address signal A and video signal V are sequentially transmitted after the synchronizing signal S and recording is made only for a small period where the character information is present. In case of L3-L3 where no character information is present in one line, the transmission of the video signal of the line is omitted and the control is transferred to the transmission of the next line. |
