发明名称 ANALOG*DIGITAL CONVERSION SYSTEM
摘要 PURPOSE:To enable to remarkably reduce the effect of differentiated nonlinearity, by scattering the size of input data of A/D converter and taking arithmetic sum of many scattered data. CONSTITUTION:Irregular signals fed to the input 1 of the measuring unit of amplitude probability density distribution are fed to the overlay circuit 5 iva the first sample hold circuit 3 and ramp signal generating circuit 4 after the amplifier 2. The circuit 4 produces the ramp signal having the amplitude change within a given level at a given time in sunchronizing with the sampling of the circuit 3. Further, the superimposed output of the circuit 5 is fed to the second sample hold circuit 7 and data are scattered with a plurality of sample-holds for the input ramp signal at a given period, the hold signal is in arithmetic average 9 after being fed to the A/D converter 8 of conventional and high speed type and fed to the memory 10. Next, the integrated output every address of the memory 10 is fed to the display unit 11 and the display of amplitude probability density is made by taking the input as the probability density curve (differentiating curve).
申请公布号 JPS55153426(A) 申请公布日期 1980.11.29
申请号 JP19790061929 申请日期 1979.05.18
申请人 YAMADA HIKARI 发明人 YAMADA HIKARI
分类号 H03M1/08;H03M1/06 主分类号 H03M1/08
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