发明名称 MULTIPLE TIME SHARING MULTIPLIER
摘要 For forming <IMAGE> in a pulse width multiplier, two input voltages bi are summed at the input of an inverter and are added, after each passes through a separate switch and proportional stage, at the input of a smoothing stage, to the inverter output signal. The switches are actuated by switching pulses which are width-modulated in accordance with the factors ci. The calculated sum is present at the output of the smoothing stage. Great accuracy in field-oriented control of rotating-field machines is possible when vector analyzers and vector rotators designed in this manner are used.
申请公布号 JPS55153071(A) 申请公布日期 1980.11.28
申请号 JP19800064668 申请日期 1980.05.15
申请人 SIEMENS AG 发明人 FUERIKUSU BURASHIYUKE
分类号 G06G7/161;G06G7/22;H02P21/06 主分类号 G06G7/161
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