Semiconductor memory device with address signal level setting.

摘要

A semiconductor memory device which writes information by rendering each of the memory cells conductive or non-conductive, wherein when a selected memory cell is to be read-out, a power supply voltage (Vcc) is applied to the collector of a transistor (Q13) which feeds base current to a transistor (Q14) in a final stage of a decoder circuit which is connected to word lines (WL), and when information is to be written-in, a voltage (EXT) higher than the power supply voltage (VCC) is applied to that collector.