发明名称 Access-time reduction control circuit and process for digital storage devices
摘要 A circuit and process for controlling access to a digital storage device is disclosed. The process involves reading a control word from a control store and partially decoding an address field of the control word to predict the storage location to be accessed. The address field is subsequently fully decoded to determine the actual storage location to be accessed. Prior to completion of this decoding step, an access to the predicted location in main storage is initiated. In the event the actual storage location to be accessed differs from the predicted one, the memory access previously initiated is overridden and an access to the actual storage location is initiated. A digital compouter system incorporating a circuit for carrying out this process exhibited significantly reduced running times for typical computer programs.
申请公布号 US4236205(A) 申请公布日期 1980.11.25
申请号 US19780953667 申请日期 1978.10.23
申请人 INTERNATIONAL BUSINESS MACHINES CORP 发明人 KINDSETH, DOUGLAS M;MITCHELL, GLEN R
分类号 G06F12/02;G06F9/30;G06F9/34;G06F9/38;G06F12/00;(IPC1-7):G06F9/22 主分类号 G06F12/02
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