发明名称 MICRO COMPUTER SYSTEM
摘要 PURPOSE:To prevent a memory from being allocated wastefully while making a memory error check possible covering the entire area of the writable memory, by controlling a check-bit generating and error detecting circuit via a memory address register, address comparing circuit, etc. CONSTITUTION:Read-only memory ROM2 and writable memory 3 are addressed consecutively and microprocessor 1 reads set program 2 in ROM2 to control data transfer between input-output port 11 and memory 3. Memory address register 4 is previously stored with address information corresponding to the address boundary between memories 2 and 3 through processor 1 and when the contents of system address bus 8 shows the address of memory 3, register 4 and comparing circuit 5 apply an access signal to check-bit generating and error detecting circuit 6 to make a memory error check covering the entire area of memory 3. This constitution never wastes both memories in allocation.
申请公布号 JPS55150198(A) 申请公布日期 1980.11.21
申请号 JP19790054227 申请日期 1979.05.04
申请人 HITACHI LTD 发明人 KAMIBAYASHI HIROAKI
分类号 G06F11/08;G06F11/00;G06F12/16;G06F13/00;G11C29/00 主分类号 G06F11/08
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