发明名称 MEMORY CIRCUIT
摘要 PURPOSE:To realize high-speed operation with malfunction prevented by interposing transistors between a sense amplifier and digit lines, and by turning ON transistors connected to selected digit lines while turning OFF transistors connected to unselected digit lines. CONSTITUTION:As for a static memory, digit lines D and D' are connected to a couple of input and output points of memory C and also led to differential sense amplifier SA, composed of transistors Q1-Q3, via tranistors Q4 and Q5. Drains of transistors Q1 and Q2 are connected to read bus lines RB and RB'. Enable transistor Q3, and transistors Q4 and Q5 of the sense amplifier are supplied with the output of Y decoder 4'. Transistors Q4 and Q5 conduct when digit lines D and D' are selected and turn OFF when unselected. Therefore high-speed operation is carried out without any malfunction.
申请公布号 JPS55150188(A) 申请公布日期 1980.11.21
申请号 JP19790057249 申请日期 1979.05.10
申请人 NIPPON ELECTRIC CO 发明人 TOKUSHIGE KAZUO
分类号 G11C11/417;G11C11/413;G11C11/419 主分类号 G11C11/417
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