发明名称 Double shift instruction for micro engine used in multithreaded parallel processor architecture
摘要 A method of operating a processor includes concatenating a first word and a second word to produce an intermediate result, shifting the intermediate result by a specified shift amount and storing the shifted intermediate result in a third word, to create an address.
申请公布号 US7191309(B1) 申请公布日期 2007.03.13
申请号 US20000070006 申请日期 2000.08.31
申请人 INTEL CORPORATION 发明人 WOLRICH GILBERT;ADILETTA MATTHEW I.;WHEELER WILLIAM;BERNSTEIN DEBRA;HOOPER DONALD
分类号 G06F9/315;G06F9/32 主分类号 G06F9/315
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