| 摘要 |
PURPOSE:To obtain an information processing unit which is able to carry out a retrial easily, by holding the address until a write error check is finished, in case of write processing to a main memory. CONSTITUTION:At the time of write processing, an address 50 is provided not only to a cache memory 3 which operates as a buffer, through a change-over circuit 1, but also to a register 7 and a main memory 9 through an address register 5. As a result of the foregoing, a control circuit 8 writes a data from a bus 53 in the main memory 9 through a change-over circuit 2, the cache memory 3, a change-over circuit 4 and a data register 6. The register 7 holds a write address until the write processing is finished, the control circuit 8 sends the address which has been held in the register 7, through the change-over circuit 1 to the cache memory 3 and the address register 5, when a write error information is received from a processor, and the rewrite processing is executed by reading out a data in the cache memory 3. |
