| 摘要 |
PURPOSE:To improve a modulation efficiency by giving information to the width as well as the interval of pulses. CONSTITUTION:The output of a 2/(2, 2) converter in pulse interval and width modulator 62 becomes the preset signal of counters 81 and 82, and these counters count timing signals (e) and (f), which are distributed alternately, by the number of preset and generate end signals (g) and (h) at the count completion. These end signals are supplied to RS-FF84, and i-number on and j-number off are generated correspondingly to codes (i) and (j) to generate pulse interval and width modulation signal (k), and code read controller 83 instructs converter 2/(2, 2) to transmit the code and controls the read of counters 81 and 82 on a basis of the change point of signal (k). Meanwhile, clock generator 85 generates prescribed-period clocks, and these clocks are gated in gate circuits 86 and 88 by signal (k) and the inverted signal obtained by causing signal (k) to pass through inverter 87 and are supplied to counter 81 and 82 alternately. Consequently, information is given to the width as well as the interval of pulses, and the modulation efficiency can be improved. |
