| 摘要 |
PURPOSE:To give the flexibility for the logical design over broad range, by limiting the power comsumption of C-MOS through the control of opposite operation between the transistor for transission gate and for cut off. CONSTITUTION:When the control signal 5 is at logic 1, the fourther transistor for transmission gate is ON and the 5th transistor for cut off is also ON. Further, the 6th transistor T6 for cut off is OFF with the control signal inverter 6 and the 3rd transistor T3 for transmission gate is ON, to give the inverter function for the circuit. Next, when the control signal is at logic 0, T3, T4 are OFF and T5, T6 are ON, causing the first and the second transistors T1, T2 constituting the output of the inverter into out-off state, and the inverter output is made disable from the external load circuit. |
