| 摘要 |
PURPOSE:To make it easy to use in common with other clocks of a control system by using a pulse duration modulation circuit operative by means of a clock comparatively low in frequency. CONSTITUTION:A comparison signal generating unit 25 of a driving signal generating circuit outputs a comparison signal 251 with a value changing in saw-tooth form which increases stepwise synchronously with the first clock 241 of a clock generator 24 and which is set to an initial value by timing of the second clock 252. Then, a correction signal generating unit 26 outputs a correction signal 261 in binary signal string, the polarity of which inverts digitally so that a mean level during the third period will be proportional to a low-order bit signal 103 of a controlling signal 101. An addition unit 27 outputs a bit compression controlling signal 271 with a value changing so that a mean level during the third period will be proportional to the controlling signal 101. Then, a comparison unit 28 outputs a pulse duration modulation signal 201, the polarity of which inverts digitally according to a size of the bit compression controlling signal 271 and the comparison signal 251. |
