发明名称 SYNCHRONIZATION DETECTION CONTROLLING SYSTEM
摘要 PURPOSE:To make it possible to receive correctly next receiving information immediately, by providing a last character data receiving mode and by switching forcecly the control code to the synchronization detection mode when last character data is received under this mode set. CONSTITUTION:Character assembling circuit part 1 receives character information bits by the control of control circuit part 3 and sets the character in character transfer circuit part 2 at the end of assembling of one character, and circuit part 3 interrupts control program 4 according to this setting. When receiving last character information EOT, program 4 sets control code 5 to code CTL=6 of the last character data receiving mode in response to interrupt. Then, circuit part 3 clears contents of circuit part 1 and switches forcedly control code 5 to CTL=5 of the synchronization detection mode. When receiving synchronizing information SYN at the start of next receiving information, circuit part 1 reports it to circuit part 3, and circuit part 3 gives character data receiving mode CTL=7 to control code 5 immediately to receive next receiving information because the synchronization detection mode is set.
申请公布号 JPS55140344(A) 申请公布日期 1980.11.01
申请号 JP19790048159 申请日期 1979.04.19
申请人 FUJITSU LTD 发明人 HANAZAWA AKIO;HIGUCHI TAIHOU
分类号 H04L7/04 主分类号 H04L7/04
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