| 摘要 |
A driving method of phase change memory device is provided to reduce power consumption by controlling a reset current and using low power in a supply process of set/reset driving voltage. A high voltage(VPP1) is supplied at an initial stage of a write operation mode for a first period(WT1). A phase change resistor device is preheated by the high voltage. The high voltage is a trigger voltage, is higher than a power supply voltage(VDD), and is lower than a pumping voltage(VPP2). The power supply voltage is supplied to the phase change resistor device for a second period(WT2). A write voltage writing a set state is an external voltage or is lower than the external voltage. Power consumption is reduced by using the write voltage in a write voltage generation process. The pumping voltage is supplied to the phase change resistor device. The write voltage is increased by a reset temperature. An amorphous phase is formed by supplying a high current for a third period(WT3). The phase change resistor device is reset.
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