| 摘要 |
<p>A manufacturing method of a semiconductor device is provided to improve reliability of a device by improving breakdown due to a snap back generated at a high voltage. A well region(110) is formed on a semiconductor substrate(100). A pair of NDT(Nmos Drift Transistor) regions(120) is formed inside the well region. An isolation film pattern is formed on the semiconductor substrate, and surrounds an active region including the well region and the drift region. A gate pattern is formed between a pair of NDT regions. A source region and a drain region are formed in the NDT region. A sub isolation film pattern for dispersing electric field is formed between the isolation film pattern and the gate pattern.</p> |
