发明名称 Integrated memory circuit.
摘要 <p>The integrated circuit is operable with low power consumption and high reliability. This circuit comprises a logic circuit (11) receiving an input logic signal (A0-An) at its input, detection means (17) for detecting a change in the logic input signal, means responsive to an output of detection means for producing a control signal (CE), and control means responsive to the control signal for setting the logic circuit at a predetermined condition irrespective of the input logic signal. </p>
申请公布号 EP0017990(A1) 申请公布日期 1980.10.29
申请号 EP19800102068 申请日期 1980.04.17
申请人 NEC CORPORATION 发明人 AKATSUKA, YASUO
分类号 G11C8/00;G11C8/06;G11C8/18;G11C11/408;G11C11/418;(IPC1-7):11C8/00;11C11/24;11C11/40 主分类号 G11C8/00
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