MEMORY COMPRISING CELL WITH LOW POWER AND HIGH SPEED

摘要

According to the present invention, disclosed is a memory device. A cell of the memory device further includes a discharge path for discharging voltage precharged in a bitline or a bitline bar during a read operation to quickly process a voltage difference between the bitline and the bitline bar. Further, the cell includes an independent discharge path with an excellent current driving capability instead of improving the current driving capability of transistors with an existing flip-flop structure, so as to enable a fast read operation while minimizing consumption of standby current in a standby state except for the read operation. Each cell comprises a storage unit including transistors and an auxiliary read unit providing an independent discharge path.