发明名称 |
Bias circuit |
摘要 |
A bias circuit for generating bias voltages or bias currents including first and second elements for generating a voltage corresponding to the sum of two voltage drops in a forward p-n junction; first and second transistors for generating a negative feedback current; at least one resistor for determining the value of a constant current for generating bias voltages; a negative feedback circuit; a third resistor connected in the feedback circuit, and; a starting element for supplying currents to the first and second elements and to the first and second transistors in an initial state when the power is turned on, whereby the feedback circuit operates to generate the constant current which is used for forming bias voltages.
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申请公布号 |
US4230980(A) |
申请公布日期 |
1980.10.28 |
申请号 |
US19790040406 |
申请日期 |
1979.05.18 |
申请人 |
FUJITSU LIMITED |
发明人 |
SANO, YOSHIAKI;HANAZAWA, TOSHIO;HONDA, HIDEO |
分类号 |
H03F1/30;G05F3/30;H03F3/187;(IPC1-7):G05F3/20 |
主分类号 |
H03F1/30 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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