发明名称 RECEIVER OF FREQUENCY SYNTHESIZER SYSTEM
摘要 PURPOSE:To realize the reduction in the lock up time or fine tuning of local oscillation frequency, by taking the frequency dividing the output of the voltage controlled oscillator as the local oscillation frequency. CONSTITUTION:Taking the frequency dividing ratio of the programmable counter 14' as N, oscillation frequency of the voltage controlled oscillator 13' as fv', and reference frequency as fr', then fv'=NXfr' is obtained. The local oscillation frequency signal fL is 1/M of the oscillation frequency fv' of the voltage controlled oscillator 13'. Since the lock up time is determined with the value of fv', it is 1/M<1/2> in comparison with the direct oscillation of fL. Further, when the frequency dividing ratio N and fv' are multiplied by M, fc' is remained as it is and the minimum changed frequency can be 1/M.
申请公布号 JPS55136732(A) 申请公布日期 1980.10.24
申请号 JP19790045582 申请日期 1979.04.13
申请人 SANYO ELECTRIC CO 发明人 AKIYAMA TOORU;OOGISHI TSUTOMU
分类号 H03J7/28;H03L7/18;H03L7/183;H04B1/26 主分类号 H03J7/28
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