发明名称 PARITY FORMING CIRCUIT
摘要 PURPOSE:To give a very simple constitution to a circuit by constituting the circuit so that a new parity bit can be obtained by the parity bit of a data processing circuit and data of a part of it. CONSTITUTION:Data group A is output from data processing circuit 1. Data a2 of this data group A is processed into data a3 by data processing circuit 3. Accompanied with this processing, new parity bit p2 is formed according to data a2 and parity bit p1 by parity forming circuit 7. In circuit 7, data a2 is transferred to exclusive OR circuit E1 for every bit, and bit P1 is transferred to exclusive OR circuit E2, and the output of circuit E1 is transferred to the other input of circuit E2. Consequently, since data a2 is 10 and bit P1 is 1 now, logic 1 is output from circuit E1, and logic 0 is output from circuit E2, and bit P2 becomes logic 0. Thus, parity bit P2 can be obtained with a very simple circuit.
申请公布号 JPS55134455(A) 申请公布日期 1980.10.20
申请号 JP19790040721 申请日期 1979.04.04
申请人 FUJITSU LTD 发明人 HOSHI FUMIO;MITA TERUYOSHI;SATOU MASAO
分类号 G06F11/10 主分类号 G06F11/10
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