Package with multiple I/O side-solderable terminals

摘要

Consistent with an example embodiment, there is leadless packaged semiconductor device having top and bottom opposing major surfaces and sidewalls extending there between. The leadless packaged semiconductor device comprises a lead frame sub-assembly having an array of two or more lead frame portions each having a semiconductor die arranged thereon. There are at least five I/O terminals wherein each of said terminals comprise a respective metal side pad wherein the respective metal side pad is disposed in a recess. A feature of this embodiment is that the each of the side pads is electroplated. The electroplated side pads accept solder and the solder menisci are contained by the recesses.

主权项

1. A lead frame sub-assembly for a leadless chip carrier (LCC), comprising:
a first sub-assembly portion including,
a first die-attach landing;a first set of I/O terminals for connection of an IC device attached to the first die-attach landing;a first connection bar boundary of the first sub-assembly portion mechanically and electrically connecting the first die-attach landing and the first set of I/O terminals to one another; a second-sub-assembly portion including,
a second die-attach landinga second set of I/O terminals for connection of another IC device attached to the second die-attach landing;a second connection bar boundary of the second sub-assembly portion mechanically and electrically connecting the second die-attach landing and the second set of I/O terminals to one another; an intermediate sub-assembly portion including,
a first intermediate set of I/O terminals for connection to the IC device or the other IC device;a first intermediate connection bar boundary connecting each one of the set respective intermediate I/O terminals, the first intermediate connection bar boundary is mechanically and electrically connected to the first connection bar boundary and the second connection bar boundary, the first intermediate connection bar boundary having an offset geometry toward a center point of the sub-assembly with respect to the first connection bar boundary and the second connection bar boundary, and wherein the first set of I/O terminals, the second set of I/O terminals, and the intermediate set of I/O terminals are co-linear with one another and vertical faces of the first set, second set and intermediate set of I/O terminals are not obstructed.