发明名称 CIRCUIT FOR COLLECTING LOCKED LOOP
摘要 A voltage controlled oscillator (VCO) and reference oscillator are connected in a phase locked loop with a first phase detector, loop switch, and acquisition sawtooth sweep circuit. A second phase detector and fast integrator circuit are connected to the VCO and reference oscillator in quadrature relation with respect to the first phase detector. As the acquisition sweep circuit sweeps the VCO, the fast integrator produces a signal whose magnitude increases as the swept VCO frequency approaches the frequency needed for the phase locked loop to achieve phase lock. When this signal magnitude exceeds a predetermined threshold, an output control signal is produced. This output control signal causes the loop switch to close and make the phase locked loop operational. A delay circuit is connected to the second phase detector and fast integrator. The delay circuit produces a delayed output at a predetermined time after the control signal is produced. The delayed output prevents the acquisition sweep circuit from further sweeping after the phase locked loop is operational. The delayed output can also be used to energize other apparatus, such as a radio transmitter. If the phase locked loop includes a mixer or divider which may produce an image or harmonic frequency that could cause erroneous phase lock, a complementary or inverted output can be derived from the second phase detector, and applied to a slow integrator. If the slow integrator output exceeds a predetermined threshold, it opens the loop switch and disables the phase locked loop. This permits the acquisition sweep circuit to operate until the proper frequency is acquired for proper operation by the phase locked loop.
申请公布号 JPS55133138(A) 申请公布日期 1980.10.16
申请号 JP19800016736 申请日期 1980.02.15
申请人 GEN ELECTRIC 发明人 JIYOHANESU JIYAKOBASU BANDEGUR
分类号 H04B1/40;H03L7/12 主分类号 H04B1/40
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