发明名称 INSULATED GATE FIELD EFFECT TRANSISTOR
摘要 PURPOSE:To shorten the channels of an insulated gate field effect transistor by forming the channel of the first gate in a double vertical diffused structure and forming the channel of a second gate in a double lateral diffused structure. CONSTITUTION:Boron is selectively diffused in an epitaxial layer 12 to form a p- type first impurity region 13. Phosphorus (P) is selectively diffused to form an n- type second impurity region 14 in the region 13 and similarly an n-type region 15 to surround the region 13 in ring shape at predetermined distance therefrom. The P is diffused in the region 14 through diffusing opening. An anisotropic etching is conducted to form a V-shaped groove 16 through the regions 13, 14 and further an impurity diffused buried layer 11. The first and second gate insulating films 17, 18 are coated on the surface between the regions 15 and 14 and on the surface of the groove, respectively, a thick field insulating film 19 is coated on the other portion. The electrodes G1, G2 of the first and the second gates and drain and soruce electrodes D and S are introduced to the films 17, 18, respectively.
申请公布号 JPS55130173(A) 申请公布日期 1980.10.08
申请号 JP19790037523 申请日期 1979.03.29
申请人 PIONEER ELECTRONIC CORP 发明人 HIRASHIMA KUNIHIKO
分类号 H01L29/417;H01L29/78 主分类号 H01L29/417
代理机构 代理人
主权项
地址