发明名称 INSULATED GATE FIELD EFFECT TRANSISTOR
摘要 PURPOSE:To shorten the channels of both gates with ready fabrication in an insulated gate effect transistor by eliminating a step of diffusing a diffused region and forming the channels using the same diffusing opening. CONSTITUTION:PN junctions are formed among first and second recesses 14, 15 formed on one main surface of a predetermined conducting high resistance semiconductor substrate 10, reverse conducting region to the substrate divided into three regions via the recesses, the lower surface of the first region 13a disposed between the recesses of these regions and the lower surface of the second region 13b as one of the residual regions. These PN junctions are then so formed as to terminate at the respective wall surfaces of the first and second recesses. There are formed the same conducting first and second channel regions 11, 12 as the substrate formed shallower than the recesses, and first and second gate electrodes G1, G2 formed through gate insulating films 16, 17, respectively on the first and second recesses, respectively. The second region 13b is used as a source, and the third region 13c is used as a drain region.
申请公布号 JPS55130172(A) 申请公布日期 1980.10.08
申请号 JP19790037522 申请日期 1979.03.29
申请人 PIONEER ELECTRONIC CORP 发明人 HIRASHIMA KUNIHIKO
分类号 H01L29/10;H01L29/417;H01L29/423;H01L29/78 主分类号 H01L29/10
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