发明名称 ONNCHIP TRIMMING INTEGRATED CIRCUIT
摘要 In a monolithic integrated circuit, on-chip trimming is implemented by connecting a zener diode across each element of a plural element trimmable resistor. Adjacent diodes are connected back to back and a pair of conventional bonding pads connected thereto. In trimming, when it is desired to short out one of the trimmable elements, the associated diode is subjected to an overload pulse by means of test probes applied to the bonding pads. Since the diodes are connected back to back, the pulse polarity will determine which diode is overloaded in the reverse bias condition. Thus, the trimmable element to be shorted is determined by pulse polarity and only one bonding pad is needed for each pair of trimmable elements.
申请公布号 JPS55127053(A) 申请公布日期 1980.10.01
申请号 JP19800029720 申请日期 1980.03.08
申请人 NAT SEMICONDUCTOR CORP 发明人 ROBAATO SHII DOBUKIN
分类号 H01L27/04;H01L21/822;H01L23/525 主分类号 H01L27/04
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