发明名称 PRODUCTION OF SEMICONDUCTOR INTEGRATED CIRCUIT
摘要 PURPOSE:To improve the performance of an IC to a great extent by using for an electrode or wiring a two-layered structure having a doped poly-Si layer and a metal silicide layer, whereby layers of a reduced resistance can be obtained. CONSTITUTION:A p<+> channel stopper 22, a field oxide film 23, a gate oxide film 24, a poly-Si layer 25 and an SiO2 layer 26 are formed on a p-type Si substrate 21. The resulting product is subjected to photo-etching using a poly-Si layer 25G as a mask, to form n<+> layers 27, 28. The side surfaces of poly-Si layers 25G, 25C, and the layers 27, 28 are then covered with oxide films 29, and Si3N4 films 26G, 26C are removed. When n-type impurity is then injected, the resistance of the poly-Si layer can be reduced to a considerable extent irrespective of the shallow n<+> layers 27, 28. A Pt layer 30 is formed by evaporation, and it is heat treated to form a platinum silicide layer 31 on the surface of the poly-Si layer only, which layer 31 has a remarkably low resistance. An unreacted Pt layer only is removed by etching by utilizing the difference in corrosion characteristics. According to this structure, unnecessary high resistance components are never generated among the elements so that an IC operable at a high speed can be obtained.
申请公布号 JPS55125651(A) 申请公布日期 1980.09.27
申请号 JP19790033734 申请日期 1979.03.22
申请人 NIPPON ELECTRIC CO 发明人 MORIMOTO MITSUTAKA;MUTA HIROKI
分类号 H01L21/3205;H01L21/28;H01L21/768;H01L23/52 主分类号 H01L21/3205
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